科技與工程學院

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沿革

科技與工程學院(原名為科技學院)於87學年度成立,其目標除致力於科技與工程教育師資培育外,亦積極培育與科技產業有關之工程及管理專業人才。學院成立之初在原有之工業教育學系、工業科技教育學系、圖文傳播學系等三系下,自91學年度增設「機電科技研究所」,該所於93學年度起設立學士班並更名為「機電科技學系」。本學院於93學年度亦增設「應用電子科技研究所」,並於96學年度合併工教系電機電子組成立「應用電子科技學系」。此外,「工業科技教育學系」於98學年度更名為「科技應用與人力資源發展學系」朝向培育科技產業之人力資源專才。之後,本院為配合本校轉型之規劃,增加學生於科技與工程產業職場的競爭,本院之「機電科技學系」與「應用電子科技學系」逐漸朝工程技術發展,兩系並於103學年度起分別更名為「機電工程學系」及「電機工程學系」。同年,本學院名稱亦由原「科技學院」更名為「科技與工程學院」。至此,本院發展之重點涵蓋教育(技職教育/科技教育/工程教育)、科技及工程等三大領域,並定位為以技術為本位之應用型學院。

107學年度,為配合本校轉型規劃,「光電科技研究所」由原隸屬於理學院改為隸屬本(科技與工程)學院,另增設2學程,分別為「車輛與能源工程學士學位學程」及「光電工程學士學位學程」。

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Now showing 1 - 10 of 23
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    A high-efficiency, broadband and high output power PHEMT balanced K-band doubler with integrated balun
    (2006-12-15) Wen-Ren Lee,Shih-Fong Chao; Zuo-Min Tsai,Pin-Cheng Huang; Chun-Hsien Lien; Jeng-Han Tsai; Huei Wang
    A high-efficiency and high output power K-band frequency doubler using InGaAs PHEMT power device is developed, which features high fundamental frequency rejection, high efficiency, good conversion gain over wide bandwidth, and high output power. A compact lumped rat-race hybrid and an output buffer amplifier are implemented on chip for a balanced design and high output power. The circuit exhibits measured conversions gain about 8 dB over the output frequencies from 12 to 22 GHz. The fundamental frequency suppression is better than 20 dB and the second harmonic saturation output power is higher than 12 dBm with a miniature chip size of 2 mm x 1 mm.
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    A high-efficiency, broadband and high output power pHEMT balanced K-band doubler with integrated balun
    (2006-12-15) Wen-Ren Lee; Shih-Fong Chao; Zuo-Min Tsai; Pin-Cheng Huang; Chun-Hsien Lien; Jeng-Han Tsai; Huei Wang
    A high-efficiency and high output power K-band frequency doubler using InGaAs PHEMT power device is developed, which features high fundamental frequency rejection, high efficiency, good conversion gain over wide bandwidth, and high output power. A compact lumped rat-race hybrid and an output buffer amplifier are implemented on chip for a balanced design and high output power. The circuit exhibits measured conversions gain about 8 dB over the output frequencies from 12 to 22 GHz. The fundamental frequency suppression is better than 20 dB and the second harmonic saturation output power is higher than 12 dBm with a miniature chip size of 2 mm x 1 mm.
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    A Q-band miniature monolithic subharmonically pumped resistive mixer
    (2006-12-01) Shih-Yu Chen; Jeng-Han Tsai; Pei-Si Wu; Tian-Wei Huang; Huei Wang
    This paper proposes a miniature Q-band monolithic subharmonically pumped resistivemixer, consisting of two pHEMT transistors, a LOreduced-size Marchand balun and RF/IF filters. Thecompact RF/IF diplex circuit and a reduced-sizebalun were used to minimize the chip size whichresults only 0.72 mm 2 . Besides, 5 dBm LO inputpower is needed which is one-third of othersubharmonically pumped mixers with more than 10dBm LO power. This mixer exhibits 12.5 � 1.5 dBup-conversion loss and 12 � 1 dB down-conversionloss with 5 dBm LO input power. Up-conversion 1-dB compression output power is -15dBm and down-conversion 1-dB compression output power is -12dBm. To our knowledge, this mixer has goodconversion with smallest chip size and minimum LOinput power.
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    The Low-Cost RF-CMOS 60-GHzTransceiver
    (2007-03-01) Tian-Wei Huang; Chi-Hsueh Wang; Hong-Yeh Chang; Pei-Si Wu; Kun-You Lin; Jeng-Han Tsai,Chin-Shen Lin; Huei Wang; Chun Hsiung Chen
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    A 30-GHz Low-Phase-Noise 0.35-μm CMOS Push-Push Oscillator Using Micromachined Inductors
    (2006-06-16) To-Po Wang; Ren-Chieh Liu; Hong-Yeh Chang; Jeng-Han Tsai; Liang-Hung Lu; Huei Wang
    A low-phase-noise 0.35-mum CMOS push-push oscillator utilizing micromachined inductors is presented in this paper. With the micromachined high-Q inductors, the oscillator achieves an oscillating frequency of 30.9 GHz while exhibiting an output power of -4 dBm with a low phase noise of -102.3 dBc/Hz at 1-MHz offset and the figure of merit (FoM) of -171.4 dBc/Hz. The fundamental rejection is 30 dB. This oscillator achieves low phase noise, good FOM, high output power, and also demonstrates the highest operating frequency among previously published Si-based and GaAs-based VCOs using micromachined structures
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    A compact 35-65 GHz up-conversion mixer with integrated broadband transformers in 0.18-μm SiGe BiCMOS technology
    (2006-06-01) Ping-Chen Huang; Ren-Chieh Liu; Jeng-Han Tsai; Hong-Yeh Chang; Huei Wang; John Yeh,Chwan-Ying Lee; John Chern
    This paper presents a compact 35-65 GHz Gilbert cell up-convert mixer implemented in TSMC 0.18- ȝm SiGe BiCMOS technology. Integrated broadband transformers and meandered thin-film microstrip lines were utilized to achieve a miniature chip area of 0.6 mm × 0.45 mm. The compact MMIC has a flat measured conversion loss of 7 ± 1.5 dB and LO suppression of more than 40 dB at the RF port from 35 to 65 GHz. The power consumption is 14 mW from a 4-V supply. This is a fully integrated millimeterwave active mixer that has the smallest chip area ever reported, and also the highest operation frequency among up-conversion mixers using silicon-based technology.
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    40-48 GHz sub-harmonic transceiver for high data-rate communication system applications
    (2008-04-24) Jeng-Han Tsai; To-Po Wang; Kun-You Lin; Tian-Wei Huang; Yi-Cheng Lin; Hsin-Chia Lu; Huei Wang
    A 40-48 GHz sub-harmonic transceiver module for millimeter-wave (MMW) high data-rate communication systems has been developed in this paper. The highlights are a sub-harmonic transmitter with 12 plusmn 3 dB conversion gain, a power amplifier with 17 plusmn 2 dBm output power, a low noise amplifier with 5 plusmn 1.5 dB noise figure, and a sub-harmonic mixer with 15 plusmn 3 dB conversion loss from 40 to 48 GHz. Furthermore, two kinds of MMW high data-rate communication applications using the 40-48 GHz sub-harmonic transceiver module were demonstrated. The experimental results show that the 40-48 GHz transceiver has Gigabit transmission capability.
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    A V-band fully-integrated CMOS distributed active transformer power amplifier for 802.15.TG3c wireless personal area network applications
    (2008-10-15) Yung-Nien Jen; Jeng-Han Tsai; Tian-Wei Huang; Huei Wang
    A 60-GHz fully-integrated and broadband distributed active transformer (DAT) power amplifier (PA) is implemented in 90-nm CMOS technology. The PA performs a flat small signal gain of 26 plusmn 1 dB from 57 to 69 GHz which covers full band for 60-GHz wireless personal network (WPAN) applications. By using the DAT output combine structure, this PA delivers 18-dBm measured output power with 12.2% PAE at 60 GHz with a compact chip size. To the best of our knowledge, this DAT CMOS PA demonstrates the highest output power among the reported 60-GHz CMOS PAs to date.
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    A 68-83-GHz power amplifier in 90 nm standard CMOS
    (2009-06-12) Jeffrey Lee; Chung-Chun Chen; Jeng-Han Tsai; Kun-You Lin; Huei Wang
    A balanced PA covering 68-83 GHz is developed in 90 nm CMOS. Using wideband power matching topology, the PA achieves power gain of greater than 18.1 dB from 68 to 83 GHz and gain flatness within 0.2 dB from 68 to 78 GHz. The PA has a maximum saturation output power of 14 dBm at 70 GHz, and greater than 11.8 dBm from 68 to 83 GHz. The best P1dB is 12 dBm at 68 GHz, and greater than 8.3 dBm from 68 to 83 GHz.
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    A 71-76 GHz CMOS variable gain amplifier using current steering technique
    (2008-06-17) Che-Chung Kuo; Zuo-Min Tsai; Jeng-Han Tsai; Huei Wang
    A 71-76 GHz high dynamic range CMOS RF variable gain amplifier (VGA) is presented. Variable gain is achieved using two current-steering trans-conductance stages, which provide high linearity with relatively low power consumption. The circuit is fabricated in a MS/RF 90-nm CMOS technology and consumes 18-mA total current from a 2-V supply. This VGA achieves a 14-dB maximum gain, a 30-dB gain controlled range, and a 4-dBm output saturation power. To the authorpsilas knowledge, this VGA demonstrates the highest operation frequency among the reported CMOS VGAs.