科技與工程學院

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沿革

科技與工程學院(原名為科技學院)於87學年度成立,其目標除致力於科技與工程教育師資培育外,亦積極培育與科技產業有關之工程及管理專業人才。學院成立之初在原有之工業教育學系、工業科技教育學系、圖文傳播學系等三系下,自91學年度增設「機電科技研究所」,該所於93學年度起設立學士班並更名為「機電科技學系」。本學院於93學年度亦增設「應用電子科技研究所」,並於96學年度合併工教系電機電子組成立「應用電子科技學系」。此外,「工業科技教育學系」於98學年度更名為「科技應用與人力資源發展學系」朝向培育科技產業之人力資源專才。之後,本院為配合本校轉型之規劃,增加學生於科技與工程產業職場的競爭,本院之「機電科技學系」與「應用電子科技學系」逐漸朝工程技術發展,兩系並於103學年度起分別更名為「機電工程學系」及「電機工程學系」。同年,本學院名稱亦由原「科技學院」更名為「科技與工程學院」。至此,本院發展之重點涵蓋教育(技職教育/科技教育/工程教育)、科技及工程等三大領域,並定位為以技術為本位之應用型學院。

107學年度,為配合本校轉型規劃,「光電科技研究所」由原隸屬於理學院改為隸屬本(科技與工程)學院,另增設2學程,分別為「車輛與能源工程學士學位學程」及「光電工程學士學位學程」。

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    A high-efficiency, broadband and high output power PHEMT balanced K-band doubler with integrated balun
    (2006-12-15) Wen-Ren Lee,Shih-Fong Chao; Zuo-Min Tsai,Pin-Cheng Huang; Chun-Hsien Lien; Jeng-Han Tsai; Huei Wang
    A high-efficiency and high output power K-band frequency doubler using InGaAs PHEMT power device is developed, which features high fundamental frequency rejection, high efficiency, good conversion gain over wide bandwidth, and high output power. A compact lumped rat-race hybrid and an output buffer amplifier are implemented on chip for a balanced design and high output power. The circuit exhibits measured conversions gain about 8 dB over the output frequencies from 12 to 22 GHz. The fundamental frequency suppression is better than 20 dB and the second harmonic saturation output power is higher than 12 dBm with a miniature chip size of 2 mm x 1 mm.
  • Item
    A high-efficiency, broadband and high output power pHEMT balanced K-band doubler with integrated balun
    (2006-12-15) Wen-Ren Lee; Shih-Fong Chao; Zuo-Min Tsai; Pin-Cheng Huang; Chun-Hsien Lien; Jeng-Han Tsai; Huei Wang
    A high-efficiency and high output power K-band frequency doubler using InGaAs PHEMT power device is developed, which features high fundamental frequency rejection, high efficiency, good conversion gain over wide bandwidth, and high output power. A compact lumped rat-race hybrid and an output buffer amplifier are implemented on chip for a balanced design and high output power. The circuit exhibits measured conversions gain about 8 dB over the output frequencies from 12 to 22 GHz. The fundamental frequency suppression is better than 20 dB and the second harmonic saturation output power is higher than 12 dBm with a miniature chip size of 2 mm x 1 mm.
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    Design of a K-band Low Insertion Loss Variation Phase Shifter Using 0.18- μm CMOS Process
    (2010-12-10) Chung-Han Wu; Wei-Tsung Li; Jeng-Han Tsai; Tian-Wei Huang
    This paper demonstrates a k-band low insertion loss variation phase shifter with over 330° continuously phase tuning range from 21-25GHz in standard 0.18-μm CMOS technology. This phase shifter is composed of a 180° continuously phase tuning range reflection type phase shifter (RTPS) and a 180° discrete switch type phase shifter (STPS). The measured phase shift range is 336° with low loss variation of 1.3dB at 22GHz and the maximum insertion loss is 16 dB at 22GHz. To the best of authors' knowledge, the MMIC is the lowest insertion loss variation phase shifter in CMOS technology at 22GHz.
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    A 24-GHz 3.8-dB NF Low-Noise Amplifier with Built-In Linearizer
    (2010-12-10) Yen-Hung Kuo; Jeng-Han Tsai; Wei-Hung Chou; Tian-Wei Huang
    A K-band low-noise amplifier with built-in linearizer using 0.18-μm CMOS technology is presented in this paper. To achieve good linearity at high frequency, a distributed derivative superposition linearization technique is used. The measured results show that the improvement of IIP3 and IM3 are 5.3 dB and 10.6 dB at 24 GHz, respectively. The proposed LNA has a noise figure of 3.8 dB and a peak gain of 13.7 dB while consuming 18 mW dc power. To the best of our knowledge, this is the first LNA with a built-in linearizer above 20 GHz in CMOS.