科技與工程學院

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沿革

科技與工程學院(原名為科技學院)於87學年度成立,其目標除致力於科技與工程教育師資培育外,亦積極培育與科技產業有關之工程及管理專業人才。學院成立之初在原有之工業教育學系、工業科技教育學系、圖文傳播學系等三系下,自91學年度增設「機電科技研究所」,該所於93學年度起設立學士班並更名為「機電科技學系」。本學院於93學年度亦增設「應用電子科技研究所」,並於96學年度合併工教系電機電子組成立「應用電子科技學系」。此外,「工業科技教育學系」於98學年度更名為「科技應用與人力資源發展學系」朝向培育科技產業之人力資源專才。之後,本院為配合本校轉型之規劃,增加學生於科技與工程產業職場的競爭,本院之「機電科技學系」與「應用電子科技學系」逐漸朝工程技術發展,兩系並於103學年度起分別更名為「機電工程學系」及「電機工程學系」。同年,本學院名稱亦由原「科技學院」更名為「科技與工程學院」。至此,本院發展之重點涵蓋教育(技職教育/科技教育/工程教育)、科技及工程等三大領域,並定位為以技術為本位之應用型學院。

107學年度,為配合本校轉型規劃,「光電科技研究所」由原隸屬於理學院改為隸屬本(科技與工程)學院,另增設2學程,分別為「車輛與能源工程學士學位學程」及「光電工程學士學位學程」。

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    A 30-60GHz CMOS sub-harmonic IQ de/modulator for high data-rate communication system applications
    (2009-01-22) Wei-Heng Lin; Wei-Lun Chang; Jeng-Han Tsai; Tian-Wei Huang
    A 30-60 GHz sub-harmonic IQ de/modulator using TSMC CMOS 0.13-mum process is presented in this paper. The IQ de/modulator consists of two FET resistive mixers, a 90deg coupler, and a Wilkinson power divider. The resistive mixer could simultaneously used as a up-converted or a down-converted mixer. Therefore, the measurement of the FET resistive mixer based modulator or demodulator will be done. The die size is 0.78 mm times 0.58 mm. Both IQ demodulator and modulator feature the conversion loss of -16plusmn1 dB and good demodulation and modulation capacity.
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    35-65-GHz CMOS broadband modulator and demodulator with sub-harmonic pumping for MMW wireless gigabit applications
    (IEEE Microwave Theory and Techniques Society, 2007-10-01) Jeng-Han Tsai; Tian-Wei Huang
    Sub-harmonic modulator and demodulator are presented in this paper using 0.13-mum standard CMOS technology for millimeter-wave (MMW) wireless gigabit direct-conversion systems. To overcome the main problem of local oscillator (LO) leakage in direct-conversion systems, the sub-harmonically pumped scheme is selected in this mixer design. An embedded four-way quadrature divider is utilized in the sub-harmonic Gilbert-cell design to generate quadrature-phases LO signals at MMW frequency. For broadband applications, a broadband matching design formula is provided in this paper to extend the operational frequency range from 35 to 65 GHz. To improve the flatness of conversion loss at high frequency, high-impedance compensation lines are incorporated between the transconductance stage and LO switching quad of the Gilbert-cell mixer to compensate the parasitic capacitance. The sub-harmonic modulator and demodulator exhibit 6 plusmn1.5 dB and 7.5 plusmn1.5 dB measured conversion loss, respectively, from 35 to 65 GHz. For MMW wireless gigabit applications, the gigabit modulation signal test is successfully performed through the direct-conversion system in this paper. To our knowledge, this is the first demonstration of the MMW CMOS sub-harmonic modulator and demodulator that feature broadband and gigabit applications.