電機工程學系

Permanent URI for this communityhttp://rportal.lib.ntnu.edu.tw/handle/20.500.12235/85

歷史沿革

本系成立宗旨在整合電子、電機、資訊、控制等多學門之工程技術,以培養跨領域具系統整合能力之電機電子科技人才為目標,同時配合產業界需求、支援國家重點科技發展,以「系統晶片」、「多媒體與通訊」、與「智慧型控制與機器人」等三大領域為核心發展方向,期望藉由學術創新引領產業發展,全力培養能直接投入電機電子產業之高級技術人才,厚植本國科技產業之競爭實力。

本系肇始於民國92年籌設之「應用電子科技研究所」,經一年籌劃,於民國93年8月正式成立,開始招收碩士班研究生,以培養具備理論、實務能力之高階電機電子科技人才為目標。民國96年8月「應用電子科技學系」成立,招收學士班學生,同時間,系所合一為「應用電子科技學系」。民國103年8月更名為「電機工程學系」,民國107年電機工程學系博士班成立,完備從大學部到博士班之學制規模,進一步擴展與深化本系的教學與研究能量。

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    Real-Time Object Tracking Based on Hardware/Software Co-design
    (2011-12-21) Chen-Chien Hsu; Shih-An Li; Wen-Ling Lin
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    Hardware/Software Co-design of Particle Filter and Its Application in Object Tracking
    (2011-06-10) Chen-Chien Hsu; Shih-An Li; Wen-Ling Lin
    This paper presents a hardware/software co-design method for particle filter based on System On Program Chip (SOPC) technique. Considering both the execution speed and design flexibility, we use a NIOS II processor to calculate weight for each particle and a hardware accelerator to update particles. As a result, execution efficiency of the proposed hardware/software co-design method of particle filter is significantly improved while maintaining design flexibility for various applications. To demonstrate the performance of the proposed approach, a real-time object tracking system is established and presented in this paper. Experimental results have demonstrated the proposed method have satisfactory results in real-time tracking of objects in video sequences.
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    Hardware/Software Co-design for Particle Swarm Optimization Algorithm
    (2010-10-13) Shih-An Li; Chen-Chien Hsu; Ching-Chang Wong; Chia-Jun Yu
    This paper presents a hardware/software (HW/SW) co-design approach using SOPC technique and pipeline design method to improve the performance of particle swarm optimization (PSO) for embedded applications. Based on modular design architecture, a particle updating accelerator module via hardware implementation for updating velocity and position of particles and a fitness evaluation module implemented on a soft-cored processor for evaluating the objective functions are respectively designed and work closely together to accelerate the evolution process. Thanks to a flexible design, the proposed approach can tackle various optimization problems of embedded applications without the need for hardware redesign. To compensate the deficiency in generating truly random numbers by hardware implementation, a particle re-initialization scheme is also presented in this paper to further improve the execution performance of the PSO. Experiment results have demonstrated that the proposed HW/SW co-design approach to realize PSO is capable of achieving a high-quality solution effectively.
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    Object Tracking Based on Hardware/Software Co-design of Particle Filter
    (American Scientific Publishers, 2012-06-01) Shih-An Li; Chen-Chien Hsu; Wen-Ling Lin; Jui-Pin Wang
    This paper presents a hardware/software co-design method for particle filter based on System on Program Chip (SOPC) technique. Considering both the execution speed and design flexibility, we use a NIOS II processor to calculate weight for each particle and a hardware accelerator to update particles. As a result, execution efficiency of the proposed hardware/software co-design method of particle filter is significantly improved while maintaining design flexibility for various potential applications. To demonstrate the performance of the proposed approach, a real-time object tracking system under the proposed framework is established and presented in this paper. Experimental results have demonstrated that satisfactory results in real-time tracking of objects in video sequences can be obtained by using the proposed method.
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    Hardware/Software Co-design for Particle Swarm Optimization Algorithm
    (Elsevier, 2011-10-15) Shih-An Li; Chen-Chien Hsu; Ching-Chang Wong; Chia-Jun Yu
    This paper presents a hardware/software (HW/SW) co-design approach using SOPC technique and pipeline design method to improve design flexibility and execution performance of particle swarm optimization (PSO) for embedded applications. Based on modular design architecture, a Particle Updating Accelerator module via hardware implementation for updating velocity and position of particles and a Fitness Evaluation module implemented either on a soft-cored processor or Field Programmable Gate Array (FPGA) for evaluating the objective functions are respectively designed to work closely together to carry out the evolution process at different design stages. Thanks to the design flexibility, the proposed approach can tackle various optimization problems of embedded applications without the need for hardware redesign. To further improve the execution performance of the PSO, a hardware random number generator (RNG) is also designed in this paper in addition to a particle re-initialization scheme to promote exploration search during the optimization process. Experimental results have demonstrated that the proposed HW/SW co-design approach for PSO algorithms has good efficiency for obtaining high-quality solutions for embedded applications.