多重模式多頻段之數位類比轉換器設計
No Thumbnail Available
Date
2010-07-31
Authors
郭建宏
Journal Title
Journal ISSN
Volume Title
Publisher
行政院國家科學委員會
Abstract
本計畫目標在實現一多重模式多頻段之數位類比轉換器設計。當多頻 段(GSM/EDGE/…)無線通訊標準對失真及雜訊規格的要求越來越高時，發 射電路內的數位類比轉換器（Digital-to-Analog Converter, DAC）就越來越 重要。而這個數位類比轉換器必須在高輸出頻率下提供更高解析度及較高 的更新速率，才能符合多頻段基地台收發器系統中，發射電路部分的要 求。同時，還必須能在更寬的頻寬內，降低雜訊與spurious emission，如在 6 MHz 外spurious下降 -80 dBc的要求等。 三角積分調變器技術由於其超取樣的特性，使得它非常適合用來實現 高解析度、高準確度的數位類比及類比數位轉換器，我們可以在無線通信 及需要高解析的積體電路上發現它的很多應用。在本計劃裏，將用此技術 合成一個數位類比轉換器，調變至高頻之後，再送至功率放大器。 本計劃先進行系統效能的評估，在眾多架構中，我們將先選出另外一 種數位類比轉換器架構，進行效能的比較，決定較可行的數位類比轉換 器，也許是一種或兩種架構都採用。然後，進行電路設計、佈局以及下線 和量測。接著，我們將設計一雙模式的數位類比轉換器，而此數位類比轉 換器將同時具有兩種架構，我們可以在同一晶片同時測試兩種架構的效 能，再來決定要使用那一種架構。而我們測試重點在(a)無寄生動態範圍 (Spurious-Free Dynamic Range，SFDR)，(b)信號雜訊比(Signal-to-Noise Ratio，SNR)，(c)互調失真(Intermodulation Distortion，IMD)，以及(d)多載 波功率比(Multi-Tone Power Ratio，MTPR)四項參數。最後會對多重模式發 射器的數位類比轉換器做一個整體的考量，以確立整體架構的可行性評 估。
The purpose of this project is to realize a digital-to-analog converter (DAC) in multi-band applications, such as GSM, GPRS, and EDGE, …, etc. With the increasing demands of low distortion and jitters, the performance of the DAC gets more and more important in transmitters. The DAC must have high-accuracy and high-speed output features to be suitable to the requirements of the transmitter in the multi-band base station. At the same time, it should be also able to decrease noise and spurious emission in wider bandwidths, for example, a -80 dBc of the spurious emission beyond 6 MHz from carrier. Delta-sigma (ΔΣ) modulators are very suitable for the realization of high resolution and high accuracy digital-to-analog converters due to its oversampling nature. It can also be found in many wireless communication applications. In this research, the ΔΣ modulator will be adopted first to implement the DAC for the polar transmitter. In this Research, more than one DAC structures will be selected and compared by their feasibility to the polar transmitter from different DAC techniques. One or/and two techniques will be chosen and applied to the transmitter system. Second, the design, simulation, layout, tapeout, and measurement of the one kind of DAC circuit will be carried out. And then the DACs for two-mode polar transmitter will be designed so that two techniques could be measured and examined simultaneously on the same chip. There are four key features in the DAC design, that is, spurious-free dynamic range (SFDR), signal-to-noise ratio (SNR), intermodulation distortion (IMD), and multi-tone power ratio (MTPR). Finally, the proposed DAC will be measured and evaluated for the whole polar transmitter system. The integration of the polar transmitter system will also be tested and evaluated.
The purpose of this project is to realize a digital-to-analog converter (DAC) in multi-band applications, such as GSM, GPRS, and EDGE, …, etc. With the increasing demands of low distortion and jitters, the performance of the DAC gets more and more important in transmitters. The DAC must have high-accuracy and high-speed output features to be suitable to the requirements of the transmitter in the multi-band base station. At the same time, it should be also able to decrease noise and spurious emission in wider bandwidths, for example, a -80 dBc of the spurious emission beyond 6 MHz from carrier. Delta-sigma (ΔΣ) modulators are very suitable for the realization of high resolution and high accuracy digital-to-analog converters due to its oversampling nature. It can also be found in many wireless communication applications. In this research, the ΔΣ modulator will be adopted first to implement the DAC for the polar transmitter. In this Research, more than one DAC structures will be selected and compared by their feasibility to the polar transmitter from different DAC techniques. One or/and two techniques will be chosen and applied to the transmitter system. Second, the design, simulation, layout, tapeout, and measurement of the one kind of DAC circuit will be carried out. And then the DACs for two-mode polar transmitter will be designed so that two techniques could be measured and examined simultaneously on the same chip. There are four key features in the DAC design, that is, spurious-free dynamic range (SFDR), signal-to-noise ratio (SNR), intermodulation distortion (IMD), and multi-tone power ratio (MTPR). Finally, the proposed DAC will be measured and evaluated for the whole polar transmitter system. The integration of the polar transmitter system will also be tested and evaluated.