基於硬體資源優化的廣義迴歸神經網路FPGA設計-以QoS應用為例

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2025

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https://etds.lib.ntnu.edu.tw/thesis/detail/4a9f2446f9275e94d75b0daf19409a7c/
 http://rportal.lib.ntnu.edu.tw/handle/20.500.12235/125839

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