教師著作

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    Admittance-Transforming Injection-Locked Frequency Divider and Low-Supply-Voltage Current Mode Logic Divider
    (2010-12-10) Yen-Hung Kuo; Jeng-Han Tsai; Wei-Hung Chou; Tian-Wei Huang
    A injection-locked frequency divider (ILFD) with a 0.8-V current mode logic (CML) frequency divider are presented in this paper. These two frequency dividers are fabricated and integrated in 0.13-μm CMOS technology. The proposed ILFD adopts the admittance-transforming to widen the locking range. To achieve low-supply-voltage in CML frequency divider, the transconductance stage of CML divider is replaced by the inductance. Under 0 dBm injected power, the measured results show that the proposed ILFD have 22.8 % bandwidth from 40.5-to-50.9 GHz. Furthermore, the divider-by-four frequency divider composed of an ILFD and CML divider are measured with locking range from 42 to 45 GHz. The ILFD and CML divider consume 3.6 mW and 8 mW dc power from 0.6 V and 0.8 V supply voltage, respectively.
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    A 24-GHz 3.8-dB NF Low-Noise Amplifier with Built-In Linearizer
    (2010-12-10) Yen-Hung Kuo; Jeng-Han Tsai; Wei-Hung Chou; Tian-Wei Huang
    A K-band low-noise amplifier with built-in linearizer using 0.18-μm CMOS technology is presented in this paper. To achieve good linearity at high frequency, a distributed derivative superposition linearization technique is used. The measured results show that the improvement of IIP3 and IM3 are 5.3 dB and 10.6 dB at 24 GHz, respectively. The proposed LNA has a noise figure of 3.8 dB and a peak gain of 13.7 dB while consuming 18 mW dc power. To the best of our knowledge, this is the first LNA with a built-in linearizer above 20 GHz in CMOS.